irfl210, sihfl210 www.vishay.com vishay siliconix s13-0169-rev. d, 04-feb-13 1 document number: 91193 for technical questions, contact: hvm@vishay.com this document is subject to change without notice. the products described herein and this document are subject to specific disclaimers, set forth at www.vishay.com/doc?91000 power mosfet features ? surface mount ? available in tape and reel ? dynamic dv/dt rating ? repetitive avalanche rated ? fast switching ? ease of paralleling ? simple drive requirements ? material categorization: for definitions of compliance please see www.vishay.com/doc?99912 description third generation power mosfets from vishay provide the designer with the best combi nation of fast switching, ruggedized device design, low on-resistance and cost-effectiveness. the sot-223 package is designed for surface-mounting using vapor phase, infrared, or wave soldering techniques. its unique package design allows for easy automatic pick-and-place as with other sot or soic packages but has the added advantage of improved therma l performace due to an enlarged tab for he atsinking. power dissipation of greater than 1.25 w is possi ble in a typical surface mount application. note a. see device orientation. notes a. repetitive rating; pu lse width limited by maximum junction temperature (see fig. 11). b. v dd = 50 v, starting t j = 25 c, l = 81 mh, r g = 25 ? , i as = 0.96 a (see fig. 12). c. i sd ? 3.3 a, di/dt ? 70 a/s, v dd ? v ds , t j ? 150 c. d. 1.6 mm from case. e. when mounted on 1" square pcb (fr-4 or g- 10 material). product summary v ds (v) 200 r ds(on) ( ? )v gs = 10 v 1.5 q g (max.) (nc) 8.2 q gs (nc) 1.8 q gd (nc) 4.5 configuration single n-channel mosfet g d s sot-223 g d s d ordering information package sot-223 sot-223 lead (pb)-free and halogen- free sihfl210-ge 3 sihfl210tr-ge3 a lead (pb)-free irfl210pbf irfl210trpbf a sihfl210-e3 sihfl210t-e3 a absolute maximum ratings (t c = 25 c, unless otherwise noted) parameter symbol limit unit drain-source voltage v ds 200 v gate-source voltage v gs 20 continuous drain current v gs at 10 v t c = 25 c i d 0.96 a t c = 100 c 0.6 pulsed drain current a i dm 7.7 linear dera ting factor 0.025 w/c linear derating fa ctor (pcb mount) e 0.017 single pulse avalanche energy b e as 50 mj repetitive avalanche current a i ar 0.96 a repetitive avalanche energy a e ar 0.31 mj maximum power dissipation t c = 25 c p d 3.1 w maximum power dissipation (pcb mount) e t a = 25 c 2.0 peak diode recovery dv/dt c dv/dt 5.0 v/ns operating junction and storage temperature range t j , t stg - 55 to + 150 c soldering recommendations (peak temperature) d for 10 s 300
irfl210, sihfl210 www.vishay.com vishay siliconix s13-0169-rev. d, 04-feb-13 2 document number: 91193 for technical questions, contact: hvm@vishay.com this document is subject to change without notice. the products described herein and this document are subject to specific disclaimers, set forth at www.vishay.com/doc?91000 note a. when mounted on 1" square pcb (fr-4 or g- 10 material). notes a. repetitive rating; pu lse width limited by maximum junction temperature (see fig. 11). b. pulse width ? 300 s; duty cycle ? 2 %. thermal resistance ratings parameter symbol min. typ. max. unit maximum junction-to-ambient (pcb mount) a r thja --40 c/w maximum junction-to-case (drain) r thjc --60 specifications (t j = 25 c, unless otherwise noted) parameter symbol test condi tions min. typ. max. unit static drain-source breakdown voltage v ds v gs = 0 v, i d = 250 a 200 - - v v ds temperature coefficient ? v ds /t j reference to 25 c, i d = 1 ma - 0.30 - v/c gate-source threshold voltage v gs(th) v ds = v gs , i d = 250 a 2.0 - 4.0 v gate-source leakage i gss v gs = 20 v - - 100 na zero gate voltage drain current i dss v ds = 200 v, v gs = 0 v - - 25 a v ds = 160 v, v gs = 0 v, t j = 125 c - - 250 drain-source on-state resistance r ds(on) v gs = 10 v i d = 0.58 a b --1.5 ? forward transconductance g fs v ds = 50 v, i d = 0.58 a 0.51 - - s dynamic input capacitance c iss v gs = 0 v, v ds = 25 v, f = 1.0 mhz, see fig. 5 - 140 - pf output capacitance c oss -53- reverse transfer capacitance c rss -15- total gate charge q g v gs = 10 v i d = 3.3 a, v ds = 160 v, see fig. 6 and 13 b --8.2 nc gate-source charge q gs --1.8 gate-drain charge q gd --4.5 turn-on delay time t d(on) v dd = 100 v, i d = 3.3 a, r g = 24 ? , r d = 30 ? , see fig. 10 b -8.2- ns rise time t r -17- turn-off delay time t d(off) -14- fall time t f -8.9- internal drain inductance l d between lead, 6 mm (0.25") from package and center of die contact -4.0- nh internal source inductance l s -6.0- drain-source body diode characteristics continuous source-dra in diode current i s mosfet symbol showing the integral reverse p - n junction diode - - 0.96 a pulsed diode forward current a i sm --7.7 body diode voltage v sd t j = 25 c, i s = 0.96 a, v gs = 0 v b --2.0v body diode reverse recovery time t rr t j = 25 c, i f = 3.3 a, di/dt = 100 a/s b - 150 310 ns body diode reverse recovery charge q rr - 0.60 1.4 c forward turn-on time t on intrinsic turn-on time is negligible (turn-on is dominated by l s and l d ) d s g s d g
irfl210, sihfl210 www.vishay.com vishay siliconix s13-0169-rev. d, 04-feb-13 3 document number: 91193 for technical questions, contact: hvm@vishay.com this document is subject to change without notice. the products described herein and this document are subject to specific disclaimers, set forth at www.vishay.com/doc?91000 typical characteristics (25 c, unless otherwise noted) fig. 1 - typical output characteristics, t c = 25 c fig. 2 - typical output characteristics, t c = 150 c fig. 3 - typical transfer characteristics fig. 4 - normalized on-resistance vs. temperature fig. 5 - typical capacitance vs. drain-to-source voltage fig. 6 - typical gate charge vs. gate-to-source voltage 91193_01 20 s pulse width t c = 25 c 4.5 v 10 1 10 0 10 -1 10 0 10 1 v ds , drain-to-source voltage (v) i d , drain current (a) 10 -1 bottom to p v gs 15 v 10 v 8.0 v 7.0 v 6.0 v 5.5 v 5.0 v 4.5 v 91193_02 4.5 v 20 s pulse width t c = 150 c 10 0 10 -1 10 0 10 1 v ds , drain-to-source voltage (v) i d , drain current (a) 10 -1 bottom to p v gs 15 v 10 v 8.0 v 7.0 v 6.0 v 5.5 v 5.0 v 4.5 v 91193_03 25 c 150 c 20 s pulse width v ds = 50 v 10 -1 10 0 i d , drain current (a) v gs , gate-to-source voltage (v) 5678910 4 10 -2 91193_04 i d = 3.3 a v gs = 10 v 3.0 0.0 0.5 1.0 1.5 2.0 2.5 - 60 - 40 - 20 0 20 40 60 80 100 120 140 160 t j , junction temperature ( c) r ds(on) , drain-to-source on resistance (normalized) 3.5 91193_05 300 250 200 150 0 100 10 0 10 1 capacitance (pf) v ds , drain-to-source voltage (v) v gs = 0 v, f = 1 mhz c iss = c gs + c gd , c ds shorted c rss = c gd c oss = c ds + c gd c iss c rss c oss 50 91193_06 q g , total gate charge (nc) v gs , gate-to-source voltage (v) 20 16 12 8 0 4 02 8 6 4 i d = 3.3 a for test circuit see figure 13 10 v ds = 40 v v ds = 100 v v ds = 160 v
irfl210, sihfl210 www.vishay.com vishay siliconix s13-0169-rev. d, 04-feb-13 4 document number: 91193 for technical questions, contact: hvm@vishay.com this document is subject to change without notice. the products described herein and this document are subject to specific disclaimers, set forth at www.vishay.com/doc?91000 fig. 7 - typical source-dr ain diode forward voltage fig. 8 - maximum safe operating area fig. 9 - maximum drain curre nt vs. case temperature fig. 10a - switching time test circuit fig. 10b - switching time waveforms fig. 11 - maximum effective transient thermal impedance, junction-to-case 91193_07 10 1 10 0 10 -1 25 c 150 c 0.4 0.8 1.6 1.2 2.0 v gs = 0 v v sd , source-to-drain voltage (v) i sd , reverse drain current (a) 91193_08 100 s 1 ms 10 ms operation in this area limited by r ds(on) t c = 25 c t j = 150 c single pulse i d , drain current (a) 10 2 2 5 2 5 2 5 v ds , drain-to-source voltage (v) 10 10 2 25 2 5 0.1 1 10 1 25 10 3 91193_09 i d , drain current (a) t c , case temperature (c) 25 150 125 100 75 50 0.0 0.4 0.6 0.8 1.0 0.2 pulse width 1 s duty factor 0.1 % r d v gs r g d.u.t. 10 v + - v ds v dd v ds 90 % 10 % v gs t d(on) t r t d(off) t f 91193_11 thermal response (z thjc ) t 1 , rectangular pulse duration (s) 10 -5 10 -4 10 -3 10 -2 0.1 1 10 10 2 10 3 1 0.1 10 -2 10 2 10 0 - 0.5 0.2 0.1 0.05 0.01 single pulse (thermal response) notes: 1. duty factor, d = t 1 /t 2 2. peak t j = p dm x z thjc + t c 0.02 p dm t 1 t 2
irfl210, sihfl210 www.vishay.com vishay siliconix s13-0169-rev. d, 04-feb-13 5 document number: 91193 for technical questions, contact: hvm@vishay.com this document is subject to change without notice. the products described herein and this document are subject to specific disclaimers, set forth at www.vishay.com/doc?91000 fig. 12a - unclamped inductive test circuit fig. 12b - unclamped inductive waveforms fig. 12c - maximum avalanche energy vs. drain current fig. 13a - basic gate charge waveform fig. 13b - gate charge test circuit r g i as 0.01 t p d.u.t l v ds + - v dd 10 v var y t p to obtain required i as i as v ds v dd v ds t p 91193_12c 100 0 20 40 60 80 25 150 125 100 75 50 starting t j , junction temperature (c) e as , single pulse energy (mj) 120 bottom to p i d 0.43 a 0.61 a 0.90 a v dd = 50 v q gs q gd q g v g charge v gs d.u.t. 3 ma v gs v ds i g i d 0.3 f 0.2 f 50 k 12 v current regulator current sampling resistors same type as d.u.t. + -
irfl210, sihfl210 www.vishay.com vishay siliconix s13-0169-rev. d, 04-feb-13 6 document number: 91193 for technical questions, contact: hvm@vishay.com this document is subject to change without notice. the products described herein and this document are subject to specific disclaimers, set forth at www.vishay.com/doc?91000 fig. 14 - for n-channel vishay siliconix maintains worldwide manufactu ring capability. products may be manufact ured at one of seve ral qualified locatio ns. reliability data for silicon technology and package reliability represent a composite of all qualified locations. for related documents such as package/tape drawings, part marking, and reliability data, see www.vishay.com/ppg?91193 . p.w. period di/dt diode recovery dv/dt ripple 5 % body diode forward drop re-applied voltage rever s e recovery current body diode forward current v gs = 10 v a i s d driver gate drive d.u.t. l s d waveform d.u.t. v d s waveform inductor current d = p.w. period + - + + + - - - peak dio d e recovery d v/ d t test circuit v dd ? dv/dt controlled by r g ? driver s ame type a s d.u.t. ? i s d controlled by duty factor d ? d.u.t. - device under te s t d.u.t. circuit layout con s ideration s ? low s tray inductance ? g round plane ? low leakage inductance current tran s former r g note a. v gs = 5 v for logic level device s v dd
document number: 91363 www.vishay.com revision: 15-sep-08 1 package information vishay siliconix sot-223 (high voltage) notes 1. dimensioning and toler ancing per asme y14.5m-1994. 2. dimensions are shown in millimeters (inches). 3. dimension do not include mold flash. 4. outline conforms to jedec outline to-261aa. d b 3 b1 0.10 (0.004) m c m h 0.10 (0.004) m c b m 0.20 (0.00 8 ) m c a m 0.10 (0.004) m c b m 3 x b e1 e 1 2 3 a e 4 c a 0.0 8 (0.003) 4 x l l1 4 x c 3 millimeters inches dim. min. max. min. max. a 1.55 1.80 0.061 0.071 b 0.65 0.85 0.026 0.033 b1 2.95 3.15 0.116 0.124 c 0.25 0.35 0.010 0.014 d 6.30 6.70 0.248 0.264 e 3.30 3.70 0.130 0.146 e 2.30 bsc 0.0905 bsc e1 4.60 bsc 0.181 bsc h 6.71 7.29 0.264 0.287 l 0.91 - 0.036 - l1 0.061 bsc 0.0024 bsc - 10' - 10' ecn: s-82109-rev. a, 15-sep-08 dwg: 5969
legal disclaimer notice www.vishay.com vishay revision: 02-oct-12 1 document number: 91000 disclaimer all product, product specifications and data are subject to change without notice to improve reliability, function or design or otherwise. vishay intertechnology, inc., its affiliates, agents, and employee s, and all persons acting on it s or their behalf (collectivel y, vishay), disclaim any and all liability for any errors, inaccuracies or incompleteness contained in any datasheet or in any o ther disclosure relating to any product. vishay makes no warranty, repres entation or guarantee regarding the suitabilit y of the products for any particular purpose or the continuing production of any product. to the maximum extent permitted by applicable law, vi shay disclaims (i) any and all liability arising out of the application or use of any product, (ii) any and all liability, including without limitation specia l, consequential or incidental damages, and (iii) any and all i mplied warranties, including warra nties of fitness for particular purpose, non-infringement and merchantability. statements regarding the suitability of products for certain type s of applications are based on vishays knowledge of typical requirements that are often placed on vishay products in generic applications. such statements are not binding statements about the suitability of products for a particular application. it is the customers responsib ility to validate that a particu lar product with the properties descri bed in the product specification is suitable fo r use in a particular application. parameters provided in datasheets and/or specification s may vary in different applications an d performance may vary over time. all operating parameters, including typical pa rameters, must be validated for each customer application by the customers technical experts. product specifications do not expand or otherwise modify vish ays terms and condit ions of purchase, including but not limited to the warranty expressed therein. except as expressly indicate d in writing, vishay products are not designed for use in medical, life-saving, or life-sustaining applications or for any other application in which the failure of the vi shay product could result in personal injury or death. customers using or selling vishay products not expressly indicated for use in such applications do so at their own risk. pleas e contact authorized vishay personnel to ob tain written terms and conditions regarding products designed for such applications. no license, express or implied, by estoppel or otherwise, to any intellectual prope rty rights is granted by this document or by any conduct of vishay. product names and markings noted herein may be trad emarks of their respective owners. material category policy vishay intertechnology, inc. hereby certi fies that all its products that are id entified as rohs-compliant fulfill the definitions and restrictions defined under directive 2011/65/eu of the euro pean parliament and of the council of june 8, 2011 on the restriction of the use of certain hazardous substances in electrical and electronic equipment (eee) - recast, unless otherwis e specified as non-compliant. please note that some vishay documentation may still make reference to rohs directive 2002/95/ ec. we confirm that all the products identified as being compliant to directive 2002 /95/ec conform to directive 2011/65/eu. vishay intertechnology, inc. hereby certifi es that all its products that are identified as ha logen-free follow halogen-free requirements as per jedec js709a stan dards. please note that some vishay documentation may still make reference to the iec 61249-2-21 definition. we co nfirm that all the products identified as being compliant to iec 61249-2-21 conform to jedec js709a standards.
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